| 1. | These advantages make usb popular in pc peripheral bus
Usb的这些特点,使得usb总线取得广泛的应用。 |
| 2. | Local peripheral bus
局域边缘总线 |
| 3. | Local peripheral bus
局域边缘总线 |
| 4. | The research and practice of this dissertation complete the design of a bus bridge module which between the on - chip system bus and the peripheral bus
本论文的研究与实践工作完成了一个片上系统总线和外设总线之间的总线桥模块设计。 |
| 5. | We can connect peripherals to the bus through the box which is on peripheral bus and in so doing we can realize the control and regulation of the bus
我们将外总线技术引入可穿戴计算机的硬件接口设计,通过总线上的连接器box将外设挂接在总线上。 |
| 6. | According to this design , we can use the usb as the peripheral bus of wearable computer , making the connection of equipments to the host computer convenient and rapid
依照此方案选择将usb总线作为可穿戴计算机的外总线,实现设备方便、快速地与主机相连。 |
| 7. | The misc logic module can capture and lock the errors of processor local bus and on - chip peripheral bus . these errors can be shown by light - emitting diode light . the chipscope _ ila core is used for debugging the fpga logic and timing
而辅助逻辑主要是用来捕获并锁定powerpc ~ ( tm ) 405的处理器局部总线( plb )和片上外围总线( opb )的错误,并通过led灯进行显示。 |
| 8. | The clb bus is a kind of on - chip system bus which is usually used to connect ips with high speed and high data width . the peripheral bus that conform the pvci standard usually used to connect ips with low speed and low data width
Clb总线是一种片上系统总线，一般用来连接高速度、高数据宽度的ip 。而符合pvci标准的外设总线上连接的往往是低速度、低数据宽度的ip 。 |
| 9. | It can communicate with powerpc ~ ( tm ) 405 and control the peripheral equipment of on - chip peripheral bus 。 the b3g test platform not only provides test method of b3g project , but also uses for high - speed data transmission . for example , the b3g test platform may get the data of simulation using fpga
B3g测试平台不仅为b3g项目提供了一种调试手段,也可以应用到其它高速数据捕获和传输的场合(如采用fpga对复杂算法进行仿真,其结果的输出等) 。 |
| 10. | The peripheral equipment , which includes serial control , b3g test tools , ddr control , interrupt control , connect the on - chip peripheral bus of powerpc ~ ( tm ) 405 . in addition , the clock module and the misc logic module are necessarily to make the b3g test platform work . in order to debug the b3g test platform , the chipscope ~ ( tm ) core is adopted
在powerpc ~ ( tm ) 405的外围总线上开发了串口控制器、 b3g测试工具、双倍数据流( ddr )内存控制器、中断控制器等外设;整个系统还需要时钟、辅助逻辑等模块;为了方便b3g测试平台的调试,将chipscope ~ ( tm )核也嵌入到了平台中。 |
